Mulya Technologies
Employees - 100+, Positions - 27+, Salary - 0 - 0 , Industry Type - IT - Software
Mulya Technologies Overview
Mulya Technologies Active Jobs
Principal Engineer Chip Design Front End
Mulya Technologies
Office Location
Full Time
- System Architecture
- RTL design
- Debugging
- Documentation
- Test management
- UPF
- Product Support
- Project Management
- Continuous improvement
- RTL Integration
- Verification Teams
- EDA Tools Proficiency
- ARM based MCU product development
- Static
- Dynamic Verification
- GLN
- Test Mode
- Synopsis EDA
- Collaboration with backend teams
- Semiconductor frontend design
Salary Information not included
Principal Engineer Chip Design Back End
Mulya Technologies
Office Location
Full Time
- physical design
- Project Management
- synthesis
- Formal Verification
- Power Integrity
- STA
- DFT
- DFM
- DRC
- collaboration
- Product Support
- Continuous improvement
- Semiconductor Chip Design
- SDC Constraint Development
- place route
- Analog Processes
- ESD Checks
- RMA Support
- Industry Standards
Salary Information not included
Senior Analog/Mixed-Signal IC Design Engineer
Mulya Technologies
Office Location
Full Time
- adc
- DAC
- OPAMP
- Comparators
- Oscillators
- DLL
- PLL
- Schematic Capture
- Matlab
- Electromigration
- Communication skills
- Teamwork
- AnalogMixedSignal IC Design
- CMOS processes
- Bandgap Reference
- Noise
- mismatch analysis
- Analog
- digital behavioral modeling
- Circuit Simulation
- ESD compliance
- Layout Parasitic Extraction
Salary Information not included
Senior RTL Design Engineer
Mulya Technologies
Office Location
Full Time
- RTL design
- Microarchitecture
- System Verilog
- Logic synthesis
- timing analysis
- IPsControllers design
- ASIC design flow
Salary Information not included
Staff RTL Design
Mulya Technologies
Office Location
Full Time
- RTL design
- ASICs
- Verilog
- VHDL
- SystemVerilog
- SystemC
- synthesis
- timing analysis
- Ethernet
- MIPI
- STA
- DFT
- physical design
- SystemonChip architectures
- SoC design methodologies
- Analog digital interfaces
- USB3
Salary Information not included
CPU/Processor Verification Core Units Lead
Mulya Technologies
Office Location
Full Time
- Functional verification
- Computer architecture
- ISA
- C
- Instruction Decode
- Processor Core Design
- Out of Order
- Super Scalar
- MultiThreaded Core Architecture
- Python Scripting
- Microprocessor designs
- SystemLevel Verification
- Agile development processes
- DevOps design methodologies
Salary Information not included
Analog Program Manager
Mulya Technologies
Office Location
Full Time
- Program Management
- GAN
- Semiconductor Industry
- Project Management
- manufacturing
- Electrical engineering
- High Voltage Power
- Crossfunctional Team Leadership
Salary Information not included
Lead Design Verification Engineer
Mulya Technologies
Office Location
Full Time
- UVM
- PCIe
- Ethernet
- SystemVerilog verification development
- AMBA AXI
- CXL
Salary Information not included
Staff Design Verification Engineer
Mulya Technologies
Office Location
Full Time
- Verilog
- System Verilog
- UVM
- OVM
- MIPI
- Ethernet
- DV methodology
- USB3
Salary Information not included
Principal CPU Verification Engineer
Mulya Technologies
Office Location
Full Time
- Functional verification
- Processors
- Computer architecture
- ISA
- C
- Branch Prediction
- Out of Order
- Super Scalar
- MultiThreaded Core Architecture
- Python Scripting
- Microprocessor designs
- verification methodologies
- Agile development processes
- DevOps design methodologies
Salary Information not included
Principal IP RTL Design Engineer DDR / LPDDR
Mulya Technologies
Office Location
Full Time
- RTL design
- DDR
- LPDDR
- HBM controller architecture
Salary Information not included
Modeling Engineer
Mulya Technologies
Office Location
Full Time
- C
- SystemC
- OOPS
- STL
- Verilog
- System Verilog
- VHDL
- Microprocessor
- Microcontrollers
- SoC architecture
- bus protocols
- Cache
- MMU
- Virtual Memory
- AMBA
- ocp
- TLM20
- Memory Architectures
- Memory Controller architectures
- TLB
- LPDDR5
- LPDDR6
- HBM4
Salary Information not included
Lead DFT Engineer
Mulya Technologies
Office Location
Full Time
- Mbist
- Boundary Scan
- Scripting
- ASIC DFT design
- SoC product development
- DFT circuit insertion
- DFTATPG EDA tools
- VerilogSystem Verilog
- STA tools
Salary Information not included
Senior Physical Design Manager
Mulya Technologies
Office Location
Full Time
- physical design
- timing closure
- Automation
- Project Management
- Team Leadership
- Continuous improvement
- Blocklevel Implementation
- Toplevel Implementation
- RDLBump Design
- Pad Location Optimization
- EMIR analysis
- Physical Verification Closure
- CAD Flow Development
- Crossfunctional Coordination
Salary Information not included
Senior Analog Design Engineer
Mulya Technologies
Office Location
Full Time
- analog circuit design
- Schematic Capture
- Simulation
- ADCS
- DACs
- amplifiers
- Filters
- Project Management
- Leadership
- Communication skills
- Analog electronics principles
- Layout Review
- PLLs
Salary Information not included
AMS Verification Engineer
Mulya Technologies
Office Location
Full Time
- Scripting
- UVM
- System Verilog
- Specman
- GLS
- CPF
- UPF
- AMS
- C based SOC DV
- Firmware verification
- PAGLS
- Cadence tools
- CDC DV
- FW DV
- Formal
- Post silicon verification
Salary Information not included
Principal Application Engineer
Mulya Technologies
Office Location
Full Time
- Analog Design
- Technical Presentations
- Training
- Verbal communication
- written communication
- Teamwork
- MixedSignal Design
- IC design technology
- highspeed data converters
- Product Demos
Salary Information not included
CPU Core Micro-Architect/Logic Designer
Mulya Technologies
Office Location
Full Time
- ISA
- RTL design
- Verilog
- VHDL
- Out of Order
- Super Scalar
- MultiThreaded Core Architecture
- Linux Operating System
- Agile development processes
- DevOps design methodologies
Salary Information not included
Analog Technical Lead
Mulya Technologies
Office Location
Full Time
- analog circuit design
- Schematic Capture
- Simulation
- ADCS
- DACs
- amplifiers
- Filters
- Project Management
- Leadership
- Communication skills
- Analog electronics principles
- Layout Review
- PLLs
Salary Information not included
Title Analog Technical Lead
Mulya Technologies
Office Location
Full Time
- analog circuit design
- Schematic Capture
- Simulation
- ADCS
- DACs
- amplifiers
- Filters
- Project Management
- Leadership
- Communication
- Analog electronics principles
- Layout Review
- PLLs
Salary Information not included
Senior Functional Verification Engineer
Mulya Technologies
Office Location
Full Time
- Functional verification
- Programming
- Verification Environment Development
- Collaborative Debugging
- Coverage Closure
- Computer Architecture Knowledge
- MultiProcessor Cache Coherency
- Gate level simulation
- emulation
- Functional Verification Methodology
- Advanced Verification Techniques
- Hardware Description Languages HDLs
- SystemLevel Verification
Salary Information not included
Staff PCIe/CXL Design Engineer ( Hyderabad )
Mulya Technologies
Office Location
Full Time
- PCIe
- Verilog
- ASICs
- FPGAs
- PCIeCXL IPs
- NVMe
- DMA architectures
- interconnect fabric protocol
Salary Information not included
Senior Performance Modeling Engineer
Mulya Technologies
Office Location
Full Time
- Python
- C
- architecture analysis
- System Software Development
- Computer architecture
- CPU
- Interconnects
- Data structures
- algorithms
- Git
- ci
- performance modeling
- Objectoriented programming
- System C
- Memory hierarchies
- Concurrent System Models
Salary Information not included
Verification Manager
Mulya Technologies
Office Location
Full Time
- Verilog
- System Verilog
- UVM
- OVM
Salary Information not included
Principal Engineer Analog Circuit Design
Mulya Technologies
Office Location
Full Time
- Analog Design
- CMOS
- LDO
- PLL
- DLL
- Verilog
- Transmitter
- Receiver
- PI circuits
- VerilogA
Salary Information not included
Machine Learning Engineer
Mulya Technologies
Office Location
Full Time
- Machine Learning
- SAG
- Python
- HL7
- UMLS
- NLP
- AI
- RAG
- Generative Frameworks
- Agentic frameworks
- PyTorch
- HuggingFace
- Fhir
- SNOMED CT
- ICD10
- RLHF
Salary Information not included
Principal Core Load Store Unit
Mulya Technologies
Office Location
Full Time
- Architecting
- designing
- ISA
- RTL design
- Verilog
- VHDL
- LoadStore Execution unit
- DCache
- Address translation
- Memory Consistency handling
- Store ordering
- Out of Order
- Super Scalar
- MultiThreaded Core Architecture
- High frequency
- Instruction pipeline designs
- Processor Core silicon bring up
- Microprocessor designs