Apply For Std. Cell/ Layout Engineers

• Digicomm Semiconductor
• Office Location
• Full Time

Experience: 3 - 3 years required

Pay:

Salary Information not included

Type: Full Time

Location: Karnataka

Skills: Standard Cell Library Development, Cell Characterization, Custom Cell Design, Standard Cell Layout Design, DRC, LVS Verification, Library Characterization, Lowpower design, Advanced Process Nodes, Design for Manufacturability DfM, Library Documentation, Library integration