Digicomm Semiconductor
Employees - 100+, Positions - 9+, Salary - 0 - 0 , Industry Type - IT - Software
Digicomm Semiconductor Overview
Digicomm Semiconductor Active Jobs
Talent Acquisition Executive
Digicomm Semiconductor
Office Location
Full Time
- Talent acquisition
- Social media
- Recruiting
- Verbal communication
- written communication
- Resume databases
- Professional networks
- Interview techniques
- Evaluation methods
- ASIC design flow
- Layout automation
Salary Information not included
Senior Embedded Systems Engineer
- Digicomm Semiconductor
- Office Location
- Full Time
- RTOS
- Communication protocols
- version control
- Debugging tools
- Embedded CC
- microcontroller programming
- Reading Schematics
- Digital electronics
Salary Information not included
Std. Cell/ Layout Engineers
- Digicomm Semiconductor
- Office Location
- Full Time
- Standard Cell Library Development
- Cell Characterization
- Custom Cell Design
- Standard Cell Layout Design
- DRC
- LVS Verification
- Library Characterization
- Lowpower design
- Advanced Process Nodes
- Design for Manufacturability DfM
- Library Documentation
- Library integration
Salary Information not included
DFT Engineers
- Digicomm Semiconductor
- Office Location
- Full Time
- Test Plan Creation
- ASICs
- post silicon DFT bringup
- debug experience
- multivendor DFT tools
- guiding
- Prioritization
Salary Information not included
Analog Layout
- Digicomm Semiconductor
- Office Location
- Full Time
- Analog
- CTS
- Routing
- timing closure
- Serdes
- PHY
- HDMI
- PLL
- adc
- DAC
- LDO
- Bandgap
- CMOS
- BiCMOS
- SOI
- Physical verification
- DRC
- LVS
- ERC
- Antenna
- DFM
- leadership skills
- Communication skills
- Mixed Signal Layout design
- FinFET processes
- PNR flow
- Ref Generators
- Charge Pump
- Current Mirrors
- Comparator
- Differential Amplifier
- AMS IP integration
- Routing Congestion
- Custom Layout
- LPE
- Analog layout techniques
- Circuit principles
- Cadence
- Mentor EDA tools
- VirtuosoXL
Salary Information not included
Analog Layout Engineer
- Digicomm Semiconductor
- Office Location
- Full Time
- Analog
- CTS
- Routing
- timing closure
- Serdes
- PHY
- HDMI
- PLL
- adc
- DAC
- LDO
- Bandgap
- CMOS
- BiCMOS
- SOI
- Physical verification
- DRC
- LVS
- ERC
- Antenna
- DFM
- leadership skills
- Communication skills
- Mixed Signal Layout design
- FinFET processes
- PNR flow
- Ref Generators
- Charge Pump
- Current Mirrors
- Comparator
- Differential Amplifier
- AMS IP integration
- Routing Congestion
- Custom Layout
- LPE
- Analog layout techniques
- Circuit principles
- Cadence
- Mentor EDA tools
- VirtuosoXL
Salary Information not included
H.R Manager
- Digicomm Semiconductor
- Office Location
- Full Time
- Regulations
- MS Office
- Communication skills
- hr policies
- Procedures
- HR Best Practices
- Problemsolving
- Customerfocused
Salary Information not included
Memory Layout Engineer
- Digicomm Semiconductor
- Office Location
- Full Time
- Layout design
- Physical verification
- leadership skills
- Communication skills
- Memory Layout Engineer
- Memory Building Block Layout Design
- Process Technology Expertise
- Routing Congestion
- Physical Verification in Custom Layout
- Verification checks like DRC LVS ERC Antenna LPE DFM
- Analog layout techniques
- Circuit principles
- Industry standard layout
- Verification tools
- Cadence
- Mentor EDA tools
- VirtuosoXL
Salary Information not included
Physical Verification Engineers
- Digicomm Semiconductor
- Office Location
- Full Time
- Documentation
- Design Rule Checking DRC
- Layout vs Schematic LVS Verification
- Electrical Rule Checking ERC
- Design for manufacturing DFM
- Process Technology Calibration
- Resolution Enhancement Techniques RET
- Fill Insertion
- MultiPatterning
- Advanced Nodes
- Hotspot Analysis
- PostProcessing Simulation
- Process Integration Checks