Apply For Staff PCIe/CXL Design Engineer ( Hyderabad )

• Mulya Technologies
• Office Location
• Full Time

Experience: 5 - 5 years required

Pay:

Salary Information not included

Type: Full Time

Location: All India

Skills: PCIe, Verilog, ASICs, FPGAs, PCIeCXL IPs, NVMe, DMA architectures, interconnect fabric protocol