Apply For Silicon Validation Engineer

• Synopsys
• Office Location
• Full Time

Experience: 0 - 0 years required

Pay:

Salary Information not included

Type: Full Time

Location: Hyderabad

Skills: FPGA Design, HDL, SystemVerilog, VB SCRIPT, Python, Bash, Statistical Analysis, Data Analysis, PCB schematic capture, Cad Software, Tcl