Apply For Emulation Engineer(3 To 7 Years)

• SpanIdea Systems
• Office Location
• Full Time

Experience: 3 - 3 years required

Pay:

Salary Information not included

Type: Full Time

Location: Hyderabad

Skills: System Verilog, Verilog, SoC architecture, Communication skills, Team Collaboration, Cadence tool flows, AXI protocol