PE And LB Timing ACL Digital
ACL Digital
Office Location
Full Time
Experience: 5 - 5 years required
Pay:
Salary Information not included
Type: Full Time
Location: Karnataka
Skills: Embedded C, C, Python, LIB timing file generation, Verilog Modelling, Analog design characterization, EMIR simulation, Embedded product knowledge like UFS, eMMC, Automation background, Experience on debugging using T32
About ACL Digital
Job Description
You should possess a minimum of 5 years of experience in the field to be considered for this position in Bengaluru. Your responsibilities will include .LIB timing file generation, Verilog Modelling, and Analog design characterization. Familiarity with Cadens spectre and Synopsys Hspice is required. Additionally, you will be expected to assist with Analog Quality Checks including EM/IR simulation. In addition to the technical skills mentioned above, you should have Embedded product knowledge such as UFS and eMMC, proficiency in Embedded C, C++, and Python, and a background in automation. Experience in debugging using tools like T32 will be highly valued. If you meet the criteria mentioned above and are looking for a challenging opportunity in the field, we encourage you to apply for this position.,