ASIC RTL Design Lead Modernize Chip Solutions (MCS)
Modernize Chip Solutions (MCS)
Office Location
Full Time
Experience: 10 - 10 years required
Pay:
Salary Information not included
Type: Full Time
Location: Hyderabad
Skills: RTL design, Verilog, SOC, PCIe, Ethernet, Lint, CDC, synthesis, tcl scripting, PERL scripting, timing analysis, Subsystem integration, USB Integration, Front end flow environment bringup, Flows, Formality, VCLP, CDC constraint development, Signoff
About Modernize Chip Solutions (MCS)
Job Description
We are looking for ASIC RTL Design Lead for Hyderabad location who can join us in an immediate basis with below skills & responsibilities: Total Years of Experience 10+Yrs Hands on RTL Design using verilog SoC and Subsystem integration, Pheripherals like PCIE, Ethernet and USB Integration Front end flow environment bringup Strong in the Flows, Lint, CDC, Synthesis, Formality, VCLP tcl or perl scripting knowledge CDC and synthesis constraint development, Timing analysis, Signoff Interested candidates can share profile to ratul.chakraborty@modernchipsolutions.com,