Apply For Standard Cell Characterization / Library Engineer
BITSILICA
Office Location
Full Time
Experience: 3 - 3 years required
Pay:
Salary Information not included
Type: Full Time
Location: Karnataka
Skills: CMOS, EDA tools, Cadence Virtuoso, Calibre, HSPICE, Standard Cell Library Development, FinFET technologies, Verilog modeling, SPICE simulation
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