Apply For Staff Silicon Validation Engineer

• Lattice Semiconductor
• Office Location
• Full Time

Experience: 8 - 8 years required

Pay:

Salary Information not included

Type: Full Time

Location: Maharashtra

Skills: FPGA, Serdes, PLL, DSP, Fabric, Verilog, VHDL, Python, Perl, JMP, R, VNA, Memory DDR, DPHY, Io, BERT, oscilloscopes, Protocol ExerciserAnalyzers