Apply For Staff Engineer ASIC Digital Design

• Clinet of Connectpro
• Office Location
• Full Time

Experience: 7 - 7 years required

Pay:

Salary Information not included

Type: Full Time

Location: All India

Skills: Digital Design, Verilog, scripting languages, Microarchitecture, synthesis, STA, Lint, CDC, Asynchronous digital designs, DDRLPDDR JEDEC protocol, DDR PHY designs, DDR training algorithms, data path designs, domain transfer designs, APBJTAG, DFI