Apply For Sr. Staff Silicon Validation Engineer

• Lattice Semiconductor
• Office Location
• Full Time

Experience: 12 - 12 years required

Pay:

Salary Information not included

Type: Full Time

Location: Maharashtra

Skills: FPGA, Serdes, PLL, DSP, Fabric, PCIe, Ethernet, SDI, USB, DisplayPort, HDMI, Verilog, VHDL, Python, Perl, Statistical Analysis, JMP, R, VNA, Memory DDR, DPHY, Io, High Speed Serdes Interface characterization, CoaXpress, JESD204, MIPI DPHY, MIPI CSIDSI2, FPGA development tools, Bench equipment, BERT, oscilloscopes, Protocol ExerciserAnalyzers