Apply For Sr Modeling Design Engineer

• Lattice Semiconductor
• Office Location
• Full Time

Experience: 8 - 8 years required

Pay:

Salary Information not included

Type: Full Time

Location: Maharashtra

Skills: Verilog, VHDL, SystemVerilog, SPICE, Leadership, Team Management, Analytical skills, Communication skills, Data Analysis, Analog Circuit Modeling, Digital Circuit Analysis, MixedSignal Circuit Modeling, ProblemSolving Skills, Collaboration Skills, visualization tools, Semiconductor Devices, Circuit Design Principles