Apply For Silicon Validation Engineer 2

• Lattice Semiconductor
• Office Location
• Full Time

Experience: 2 - 2 years required

Pay:

Salary Information not included

Type: Full Time

Location: Maharashtra

Skills: Verilog, VHDL, Python, Perl, Statistical Analysis, JMP, R, VNA, FPGA Prototyping, Debugging, Communication skills, Problem Solving, High Speed Serdes Interface characterization, Protocol Compliance Testing, FPGA development tools, Bench equipment, BERT, oscilloscopes, Protocol Exerciser, Protocol Analyzers, FPGA Emulation, Signal Integrity Evaluation