Apply For Silicon RTL Design Engineer, TPU, Google Cloud

• Google
• Office Location
• Full Time

Experience: 3 - 3 years required

Pay:

Salary Information not included

Type: Full Time

Location: Karnataka

Skills: Verilog, SystemVerilog, Microarchitecture, synthesis, Python, Perl, ASIC, SoC development, ASIC design verification, timingpower analysis, Design for testing, CC, SoC designs, Integration flows, Arithmetic units, Processor design, Accelerators, Bus architectures, fabricsNoC, Memory hierarchies, High performance design techniques, Low Power Design Techniques