Apply For Silicon Networking Microarch And RTL Lead, Google Cloud

• Google
• Office Location
• Full Time

Experience: 5 - 5 years required

Pay:

Salary Information not included

Type: Full Time

Location: Karnataka

Skills: Verilog, SystemVerilog, VHDL, Microarchitecture, synthesis, scripting languages, Python, Perl, ASIC development, IPS, subsystems, networking domain, ASIC design verification, timingpower analysis, Design for testing, SoC designs, Bus architectures, fabricsNoC, Processor design, Accelerators, Memory hierarchies, High performance design techniques, Low Power Design Techniques