Apply For Senior Design Verification Lead (PCIE)
Eximietas Design
Office Location
Full Time
Experience: 5 - 5 years required
Pay:
Salary Information not included
Type: Full Time
Location: Karnataka
Skills: PCIe, Ethernet, MIPI, DDR, System Verilog, assertions, Team Management, SoC Design Verification, Highspeed peripherals, Lowspeed peripherals, CXL, HBM, functional coverage, Gatelevel simulations, Poweraware Verification, Synopsys VCS, Cadence Xsim, Mentorship
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