Apply For SENIOR CHIP DESIGN ENGINEER

• beechi vidya kendra
• Office Location
• Full Time

Experience: 5 - 5 years required

Pay: INR 30 Lac - INR 30 Lac /year

Type: Full Time

Location: Karnataka

Skills: Verilog, System Verilog, scripting languages, C, Perl, Python, Design Automation, PCIe, DDR, AMBA, Tcl, CHI, Network on Chip NOC, Coherent fabrics, NonCoherent fabrics