Apply For RTL Design Engineer (Sr Lead)

• Qualcomm
• Office Location
• Full Time

Experience: 1 - 1 years required

Pay:

Salary Information not included

Type: Full Time

Location: Karnataka

Skills: USB, PCIe, Ethernet, System Verilog, Verilog, Perl, Python, ASIC IP cores design, AMBA protocols, SoC clockingresetdebug architecture, Low power design, Multi Clock designs, Asynchronous interface, ASIC development tools, CC