Apply For Product Validation Engineer II
Cadence Design Systems
Office Location
Full Time
Experience: 2 - 2 years required
Pay:
Salary Information not included
Type: Full Time
Location: Noida
Skills: DFT, ATPG, synthesis, Verilog, ASIC design flows, RTL Verilog, VHDL coding, Digital electronics, DFT techniques, Test standards
Jobs Form