Apply For Modeling Design Engineer
Lattice Semiconductor
Office Location
Full Time
Experience: 6 - 6 years required
Pay:
Salary Information not included
Type: Full Time
Location: Maharashtra
Skills: analog circuit design, Digital Circuit Design, Verilog, VHDL, SystemVerilog, SPICE, SystemC, Simulation, Technical leadership, Documentation, Data Analysis, Communication, collaboration, MixedSignal Circuit Design, Circuit Modeling, Mentorship, Problemsolving
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