Apply For Lead RTL Design

• Modernize Chip Solutions (MCS)
• Office Location
• Full Time

Experience: 7 - 7 years required

Pay:

Salary Information not included

Type: Full Time

Location: Karnataka

Skills: RTL Coding, Verilog, SystemVerilog, SoC architecture, AXI, AHB, APB, timing closure, Design compiler, Spyglass, VCS, Analytical skills, soc integration, synthesis flows, Constraints development, Debugging skills