Apply For Lead Physical Design Engineer

• ACL Digital
• Office Location
• Full Time

Experience: 7 - 7 years required

Pay:

Salary Information not included

Type: Full Time

Location: All India

Skills: synthesis, CTS, Floor Planning, clock tree synthesis, Clock Distribution, Extraction, timing closure, Physical verification, DFM, Perl, Full chip PnR, IO ring, multi voltage design, place route, Timing Convergence, IREM checks, signoff DRCLVS closure, power, signal integrity analysis, Automation Skills, Tcl, EDA toolspecific scripting