Apply For IP Logic Design Engineer

• Intel
• Office Location
• Full Time

Experience: 6 - 6 years required

Pay:

Salary Information not included

Type: Full Time

Location: Karnataka

Skills: RTL Coding, Microarchitecture, Verilog, System Verilog, Python, Perl, Power management, timing closure, CDC, Jasper, I2C, SPI, UART, DFX, scan insertion, synthesis flow, FEV, formal property verification, I3C, ATPG coverage, VISA insertion