Apply For ASIC Digital Design Engineer (Lead / Staff)

• Qualcomm
• Office Location
• Full Time

Experience: 2 - 2 years required

Pay:

Salary Information not included

Type: Full Time

Location: Karnataka

Skills: RTL design, Verilog, VHDL, UPF, synthesis, bus protocols, Formal Verification, Perl, Python, Database Management, Clearcase, Clearquest, Logical Equivalence checks, low power design methodology, clock domain crossing designs, Spyglass LintCDC checks, Tcl