Tenstorrent
Employees - 100+, Positions - 3+, Salary - 0 - 0 , Industry Type - IT - Software
Tenstorrent Overview
Tenstorrent Active Jobs
RISC-V CPU Core Testbench Lead
Tenstorrent
Office Location
Full Time
- SystemVerilog
- UVM
- C
- ARM
- x86
- Debugging
- Analytical skills
- Communication
- collaboration
- Automation
- CPU architectures
- RISCV
Salary Information not included
Staff /Senior Design Engineer IP/Sub-System
- Tenstorrent
- Office Location
- Full Time
- Verilog
- System Verilog
- ARM
- AXI
- AHB
- APB
- Power analysis
- ASIC development
- RISCV
- CHI
- Functional safety implementation
- IP Quality checks
- DV tools
- Physical Design implementation
- Static Timing report analysis
- Logical Equivalence Checking
- DesignforPower
- DesignforDebug
- DesignforTest
Salary Information not included
Senior/Staff Engineer, Physical Design(Clocking)
- Tenstorrent
- Office Location
- Full Time
- clock tree synthesis
- timing
- CDC
- Python
- Perl
- clock network design
- lowpower design techniques
- advanced technology nodes
- writing scripts
- Synopsys FC
- ICC2
- Tcl