Senior Engineer FPGA Coherent

Senior Engineer(FPGA)

Primary Duties & Responsibilities

• Architect, design, implement and test HDL modules for the payload following best practices such as efficiency, maintainability, and testability.
• Gather, define, and document requirements to meet existing and anticipated needs for payload systems.
• Develop, analyze, and review data to validate and verify the system meets specifications and design requirements.
• Implement real-time control algorithms and data processing routines to meet mission-critical performance requirements.
• Work closely with the software and hardware engineers to integrate and develop formal design verification and validation plans and perform or oversee testing.
• Maintain high-quality documentation of the entire design. Develop user manuals and troubleshooting guidelines for end-users.
• Ensure that the FPGA/RTL design meets industry standards.
• Work with cross-functional global teams with external stakeholders.

Education & Experience

• Bachelors / master's degree in engineering.
• Minimum 5 years of experience in Firmware Development and FPGA development.
• Strong understanding of FPGA development tools, synthesis, simulation, and verification process. Experience with Intel-based SoCs, Quartus Prime, Modelsim, NIOS, etc.
• Proficient in FAGA designing and RTL(verilog) programming.
• Strong experience in the FPGA design process and writing device drivers in VHDL and or Verilog-embedded applications on FPGAs.

Skills

• Experience with designing state machines and hardware interfacing with the understanding of high-speed communication interfaces (SPI, I2C, UART, and LVDS).
• Experience with software/firmware verification with test benches to verify design logic and generate high-quality documentation of the design and test results.
• Experience working in the hardware lab with knowledge of electronic equipment such as multimeters, function generators, oscilloscopes, logic analyzers, etc.
• Familiarity with digital signal processing (DSP) and high-speed data interfaces.
• Knowledge of how to optimize for memory/timing/power under resource constraints.
• Knowledge of understanding hardware design and SoC's specific schematics.
• Must be hard-working with good communication skills.
• Must be able to work both independently with minimal guidance, as well as part of a team.
• Be flexible and ability to excel in a cross-organizational, cross-cultural, global team environment.
• Good to have knowledge of c/c++/python/shell programming.
• Experience working on multiple stages of the product development lifecycle (project initiation, design completion, release, and maintenance with version control)

Working Conditions

• Should be flexible to work outside of business hours.
• The work mode of Finisar India is Hybrid i.e. 3 days at office.