RTL Verification Canvendor
Canvendor
Office Location
Full Time
Experience: 5 - 5 years required
Pay:
Salary Information not included
Type: Full Time
Location: Hyderabad
Skills: FPGA, SystemVerilog, Ethernet, PCIe, SPI, I2C, USB, Debugging, Perl, Python, SVUVM testbenches, UVM programing, HW testing, Xilinx technology, FPGA verification, Scripting language, Tcl
About Canvendor
Job Description
#Urgent_Opening_for Canvendor #Hiring: RTL Verification (5+ Years Experience) | Hyderabad | Immediate Joiners Preferred Location: Hyderabad, India Experience: 5+ Years Domain: Semiconductor Notice period: Immediate to 30days Skills Highlighted: SV/UVM testbenches at Top/Sub-system/Block-levels. FPGA #Key_Requirements: HW Verification Engineer - Responsible for #RTL_verification, developing Develop SV/UVM #testbenches at Top/Sub-system/Block-levels. - Responsible for driving test plan and test spec development and execution, generating documents, such as user-guide, test plan, test spec, test report etc., - Engaging in verification environment architecture and methodology development. - Experience in #System_Verilog and #UVM programing - Experience with verification of #protocols like Ethernet/PCIe/SPI/I2C/USB - Experience in#HWtesting, including working with test equipment logic and traffic analysers, test generators, etc. - Experience with #Xilinx technology and tools, #FPGA verification and test - Strong #debugging skills at device and board level - Scripting language experience like Perl, Python or TCL - Excellent interpersonal, written and verbal communication skills - Excellent communication, problem solving and analytical skills If interested kindly share your updated CV to anushab@canvendor.com,