Physical Design Lead HCLTech
HCLTech
Office Location
Full Time
Experience: 7 - 7 years required
Pay:
Salary Information not included
Type: Full Time
Location: All India
Skills: physical design, Leadership, Team Management, floorplanning, Placement, clock tree synthesis, Routing, static timing analysis, ASICs, SoCs, Analytical skills, Communication, collaboration, Project Management, design rules, Manufacturability Guidelines, Physical Design Tools, digital design concepts, Problemsolving
About HCLTech
Job Description
We are looking for a highly motivated and experienced Physical Design Lead to join our dynamic team and play a vital role in the physical design and implementation of next-generation integrated circuits (ICs). This leadership role offers the opportunity to leverage your expertise in physical design methodologies and lead a team in achieving successful tapeouts. Responsibilities: Leadership: Lead and manage a team of physical design engineers, fostering a collaborative and high-performing work environment Delegate tasks, provide technical guidance, and mentor junior engineers to ensure their professional development Motivate and inspire the team to achieve project goals and deadlines Foster a culture of continuous learning and knowledge sharing within the physical design group Physical Design Expertise: Define and implement the overall physical design strategy for assigned projects, considering factors like performance, power, and area Perform floorplanning, placement, clock tree synthesis (CTS), and routing for complex digital circuits Ensure adherence to design rules and manufacturability guidelines Utilize physical design tools and methodologies (place and route tools, static timing analysis tools) to achieve timing closure and optimal physical design Collaborate with design, verification, and layout teams to ensure seamless integration throughout the design flow Participate in design reviews and provide technical leadership on physical design aspects Project Management: Manage physical design project schedules and budgets, ensuring timely completion within resource constraints Track project progress, identify potential risks, and implement mitigation strategies Communicate project status and challenges effectively to stakeholders (engineering leadership, product management) Qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field (Master's degree a plus) 7-10 years of solid experience in physical design of ASICs or SoCs Proven track record of leading and mentoring a physical design team to successful tapeouts In-depth knowledge of physical design methodologies (floorplanning, placement, routing, CTS, static timing analysis) Expertise in industry-standard physical design tools (place and route tools, static timing analysis tools) Strong understanding of digital design concepts and principles (combinational logic, sequential logic) Excellent problem-solving and analytical skills with a focus on achieving timing closure and design optimization Effective communication, collaboration, and leadership skills to motivate and guide the team Ability to manage multiple projects, prioritize tasks, and meet deadlines,