Functional Verification Engineer UVM Screen2Hire Consulting LLP
Screen2Hire Consulting LLP
Office Location
Full Time
Experience: 2 - 2 years required
Pay:
Salary Information not included
Type: Full Time
Location: Noida
Skills: SystemVerilog, UVM, IP Verification, assertions, VCS, Questa, Bug Tracking, JIRA, Bugzilla, RTL designs, SoClevel designs, UVMbased testbenches, functional coverage, SVA, simulators, Xcelium
About Screen2Hire Consulting LLP
Job Description
The position is with one of our IDM client. Job Summary: As a Functional Verification Engineer, you will be responsible for verifying RTL designs using SystemVerilog and UVM. Youll develop testbenches, build reusable components, and ensure complete functional coverage of IPs or SoC-level designs. Key Responsibilities: Develop and maintain UVM-based testbenches for IP/subsystem/SoC verification Create test plans from microarchitecture/design specifications Write and debug directed and constrained-random tests Implement functional coverage, assertions (SVA), and checkers Run regressions using simulators like VCS, Xcelium, or Questa Interface with RTL, DFT, and Firmware teams to track and resolve bugs. Analyze waveforms (using DVE/SimVision), track bugs, and maintain bug databases (JIRA, Bugzilla) Education: B.E./B.Tech or M.E./M.Tech in Electronics, Electrical, or VLSI Design Job Types: Full-time, Permanent Schedule: Day shift Work Location: In person,