FPGA RTL Design Engineer Source-right
Source-right
Office Location
Full Time
Experience: 10 - 10 years required
Pay:
Salary Information not included
Type: Full Time
Location: Karnataka
Skills: RTL, FPGA design flow, validationtesting
About Source-right
Job Description
You have a great opportunity to join as a Design Engineer with FPGA experience in Bangalore. With a preferred experience of 10+ years, you will be involved in FPGA design flow, RTL experience, and validation/testing at the board level. This is a full-time position in the category of Others. The ideal candidate should have a strong background in FPGA RTL Design. If you are ready to take on this exciting challenge and meet the experience requirement, we encourage you to apply. The notice period for this position is 0-30 days.,