Design Verification Engineer HCL Technologies

Design Verification Engineer

We have open position for Design Verification Engineer.

Role & responsibilities

• 5+ years of experience in Design Verification
• Strong proficiency in System Verilog (SV) and UVM
• Experience in IP/SOC level verification
• Solid knowledge of protocols like AMBA, PCIe, USB, DDR, Ethernet

Notice period: Immediate to 45 days.

Interested candidate kindly share your updated resume to given email id: maheswari.od@hcltech.com with the below details:

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