Analog Mixed Signal Design-Staff Engineer Cyient
Cyient
Office Location
Full Time
Experience: 5 - 5 years required
Pay:
Salary Information not included
Type: Full Time
Location: Hyderabad
Skills: Analog Design, Mixed Signal Design, circuit design, Validation, timing analysis, PMIC Blocks, dcdc converter, LDOs, Clocking circuits, CMOS Design, Active Filter Design, Mixed Signal Validation, Reliability Validation, High Speed Digital Circuit Design, Flow Closure, Digitally Assisted Analog Circuit, Control systems, Bandgap Reference, OpAmps, Feedback, Compensation Techniques, Passive RC Circuits, Switched Cap Circuits, LC VCODCO Design, VCO Performance Parameters, PLL Architecture
About Cyient
Job Description
The ideal candidate should possess experience in Analog and Mixed Signal Design, focusing on PMIC blocks such as DC-DC converter (BUCK, BOOST), LDOs, and clocking circuits. A strong foundation in CMOS design and active filter design is essential for this role. Responsibilities will include circuit design, validation, mixed signal validation, and reliability validation. Exposure to PMIC designs, high-speed digital circuit design, and analysis with timing and flow closure is required. Additionally, knowledge of digitally assisted analog circuits and techniques is preferred. The candidate will be entrusted with developing high-speed, low-power, and reliable analog and digital circuits for various PLL areas. Proficiency in control systems, Bandgap reference, bias, op-amps, feedback, and compensation techniques is necessary. Joining an expanding analog/mixed-signal circuit design team involved in cutting-edge foundry process development nodes, the selected candidate will be expected to focus on Analog blocks and clocking circuits. Proficiency in CMOS design, passive RC circuits, and switched-cap circuits is crucial for success in this role. Task responsibilities will encompass circuit design, validation, mixed signal validation, and reliability validation. Additionally, the candidate should be adept in high-speed digital circuit design and analysis with timing and flow closure, as well as digitally assisted analog circuit and techniques. The role will involve the development of high-speed, low-power, and reliable analog and digital circuits for various PLL areas, requiring a good understanding of control systems, band gaps, bias, op-amps, LDOs, feedback, compensation techniques, as well as experience in LC VCO/DCO design. Exposure to VCO performance parameters and complete PLL architecture is highly desirable.,