AMS Design, Verification And Layout Canvendor

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Job Description

#Urgent_Opening_for Canvendor #Hiring: AMS Design, Verification and Layout (4+ Years Experience) | Bangalore/ Hyderabad / Noida| Immediate Joiners Preferred Location: Bangalore / Hyderabad / Noida Experience: 4+ Years Domain: Semiconductor Notice period: Immediate to 30days #Key_Requirements: -Design analog and mixed-signal circuits such as amplifiers, data converters, PLLs, and regulators, and perform detailed transistor-level simulations (DC, AC, transient, #PVT, Monte Carlo). -Develop and maintain behavioral models (#Verilog-A/AMS) and build comprehensive testbenches for mixed-signal co-simulation with digital blocks. -Execute block-level and top-level verification, including functional, corner-case, noise, and signoff simulations, ensuring design meets specifications under all conditions. -Create physical layouts for AMS blocks, applying advanced layout techniques (matching, shielding, symmetry) to minimize parasitic effects and performance variations. -Perform physical verification tasks such as #DRC (Design Rule Check), #LVS (Layout vs. Schematic), and parasitic extraction to ensure manufacturability and design integrity. -Collaborate proactively with circuit design, verification, and layout teams to deliver high-quality AMS IP on schedule and aligned with foundry requirements. #Key_Tools_Skills EDA Tools: Cadence Virtuoso (schematic & layout), Spectre/HSPICE (simulation), AMS Designer/VCS AMS (co-simulation), Calibre/Assura (physical checks) Strong knowledge of analog circuit principles, mixed-signal interaction, and layout best practices. Good teamwork, communication, and documentation skills. If interested kindly share your updated CV to anushab@canvendor.com,