Cadence

Employees - 100+, Positions - 24+, Salary - 0 - 0 , Industry Type - IT - Software

Cadence Overview

Cadence Active Jobs

Lead Support Application Engineer

  • Client name Cadence
  • Location Office Location
  • Employment type Full Time
  • Debugging
  • Perl
  • EMIR analysis
  • PDN analysis
  • digital logic design
  • CMOS logic Design
  • Power IR drop analysis
  • circuit design
  • Analysis
  • Digital
  • Behavioral simulation
  • low power analysis
  • Power domain analysis
  • IC
  • Package Design
  • Digital design toolsets of Cadence
  • Hardware description languages
  • Tcl
  • Python Scripting

Salary Information not included

Sr Principal Design Engineer

  • Client name Cadence
  • Location Office Location
  • Employment type Full Time
  • RTL design
  • Verilog
  • System Verilog
  • UVM
  • AXI34
  • DDR Memory Controller
  • IP Development

Salary Information not included

Sr Principal Software Engineer

  • Client name Cadence
  • Location Office Location
  • Employment type Full Time
  • RTL design
  • VHDL
  • Verilog
  • System Verilog
  • static timing analysis
  • FPGA Prototyping
  • emulation
  • Communication skills
  • AMD ultrascale
  • Xilinx
  • Vivado
  • Problemsolving
  • Team player

Salary Information not included

Sr Systems Engineer - Storage

  • Client name Cadence
  • Location Office Location
  • Employment type Full Time
  • Documentation
  • Automation
  • data storage environment
  • technical system expertise
  • diagnose
  • Resolve Issues
  • backup recovery procedures
  • Foreman
  • Elk
  • Grafana
  • Unix infrastructure

Salary Information not included

Lead Design Engineer

  • Client name Cadence
  • Location Office Location
  • Employment type Full Time
  • LDO
  • PLL
  • Matching
  • Shielding
  • Power management
  • Scripting
  • Automation
  • Communication skills
  • Documentation
  • presentation skills
  • Analytical skills
  • Analog IP
  • OpAmps
  • Bandgaps
  • Data Converters
  • DSM technology
  • Analog layout techniques
  • High speed Analog Serdes
  • Floorplan constraints
  • IP integration
  • ProblemSolving Skills

Salary Information not included

Lead / Principal Analog Design Engineer

  • Client name Cadence
  • Location Office Location
  • Employment type Full Time
  • Analog Design
  • layout
  • Digital Design
  • Documentation
  • silicon validation
  • DDR
  • PLL
  • Rx
  • LDO
  • PoC
  • GDDR
  • LPDDR
  • High Speed Circuits
  • Tx
  • Clocking circuits
  • BGR
  • temp sensor

Salary Information not included

Principal Cloud Engineer

  • Client name Cadence
  • Location Office Location
  • Employment type Full Time
  • Java
  • Python
  • Spring framework
  • JPA
  • Hibernate
  • Agile methodology
  • API Development
  • OOD
  • oop
  • Database design
  • aws
  • Azure
  • GCP
  • SpringBoots
  • RESTful API Development
  • Microservices Architecture
  • Cicd Pipeline

Salary Information not included

Principal Software Engineer

  • Client name Cadence
  • Location Office Location
  • Employment type Full Time
  • C
  • HDL
  • PCIe
  • Java
  • CXL

Salary Information not included

Senior Executive Finance

  • Client name Cadence
  • Location Office Location
  • Employment type Full Time
  • Accounting
  • US GAAP
  • Statutory audit
  • Tax Audit
  • IFC
  • Internal Audit
  • Blackline
  • Ind AS
  • GST Compliances
  • MSME Act
  • Shops
  • Establishment Act

Salary Information not included

Lead Application Engineer

  • Client name Cadence
  • Location Office Location
  • Employment type Full Time
  • Sales Strategy
  • Technology Evangelism
  • presentation skills
  • relationship building
  • RTLtoGDSII metrics
  • Methodology development
  • ML based Solutions
  • scripting techniques
  • Debugging skills
  • Problemsolving
  • CrossFunctional Collaboration

Salary Information not included

Principal Education Application Engineer

  • Client name Cadence
  • Location Office Location
  • Employment type Full Time
  • Simulation
  • AnalogMixedSignal Design
  • verification flowsmethodologies
  • designing
  • analyzing analog
  • Mixedsignal circuits
  • creating test benches for mixedsignal
  • mixedlanguage designs
  • modeling DUT
  • testbench for Top Level Verification
  • working knowledge of analogmixedsignal Cadence design tools
  • simulators
  • SystemVerilogrealnumber modeling capabilities
  • lowpower mixedsignal design requirements with CPF
  • UPF
  • English Communication Skills

Salary Information not included

Intern-Marketing

  • Client name Cadence
  • Location Office Location
  • Employment type Full Time
  • SEO
  • Paid Media
  • Digital Marketing
  • Keyword research
  • Analytics
  • Communication skills
  • Writing
  • Analytical skills
  • YouTube Optimization
  • SEO reporting
  • Ad Platform Data Analysis

Salary Information not included

Physical Design/Synthesis/STA AE Engineer

  • Client name Cadence
  • Location Office Location
  • Employment type Full Time
  • Sales Strategy
  • Technology Evangelism
  • Debugging
  • presentation skills
  • relationship building
  • RTLtoGDSII metrics
  • Methodology development
  • ML based Solutions
  • scripting techniques
  • Problemsolving

Salary Information not included

IT-Sr Systems Engineer (M&A Tier 0 / Virtualization Engineer)

  • Client name Cadence
  • Location Office Location
  • Employment type Full Time
  • System Administration
  • redhat linux
  • AIX
  • LDAP
  • Networking
  • SUSE Linux
  • Cent OS
  • DNS servers
  • HW support
  • Foreman
  • Elk
  • Grafana

Salary Information not included

Sr Application Engineer

  • Client name Cadence
  • Location Office Location
  • Employment type Full Time
  • customer interaction
  • Scripting
  • Physical verification
  • Analog Layout Design
  • Virtuoso Layout
  • IC design technology
  • Cadence Layout Tools

Salary Information not included

Principal ATE test engineer

  • Client name Cadence
  • Location Office Location
  • Employment type Full Time
  • Test Time Reduction
  • Characterization
  • PERL scripting
  • Assembly Process
  • ATE test solutions
  • ATE platforms
  • convert vectors
  • test programs
  • Qualifications
  • Troubleshoot
  • analyze complex problems
  • Multitasking
  • meet deadlines
  • Advantest 93k Tester platform
  • Teradyne IGXL Tester platform
  • STIL
  • STDF file formats
  • bench instruments
  • OOP based programming
  • Data analysis tools
  • HTOL methodology

Salary Information not included

Sr Principal Software Enginer

  • Client name Cadence
  • Location Office Location
  • Employment type Full Time
  • C
  • Parallel programming
  • Data structures
  • GUI design
  • Qt
  • LISP
  • SQL
  • Python
  • ObjectOriented Design
  • Algorithm Complexity
  • SKILL

Salary Information not included

Principal Technical Quality Engineer

  • Client name Cadence
  • Location Office Location
  • Employment type Full Time
  • Digital IC Design
  • Defect Management
  • Root Cause Analysis
  • Corrective actions
  • Analog IC design
  • IC Verification
  • Silicon Fabrication Quality Assurance
  • ISO9001
  • ISO26262

Salary Information not included

Lead Product Engineer - UCIe & Functional Verification

  • Client name Cadence
  • Location Office Location
  • Employment type Full Time
  • Verification
  • Design
  • Functional verification
  • System Verilog
  • Debugging
  • UCIe domain
  • UVM methodology
  • Problemsolving

Salary Information not included

IT- Sr Systems Engineer (Infrastructure)

  • Client name Cadence
  • Location Office Location
  • Employment type Full Time
  • Windows System Administration
  • Active Directory
  • DNS
  • dhcp
  • Windows Administration
  • Scripting
  • Analytical skills
  • Verbal communication
  • written communication
  • Windows serverclient security compliance
  • Email infrastructure support
  • FilePrint services
  • O365 services
  • Intune
  • Teams
  • OneDrive
  • Microsoft OS
  • Group Policies
  • ProblemSolving Skills

Salary Information not included

Lead Product Engineer - MIPI Protocol

  • Client name Cadence
  • Location Office Location
  • Employment type Full Time
  • Verification
  • Design
  • MIPI
  • System Verilog
  • Debugging
  • written communication
  • Verbal communication
  • presentation skills
  • UVM methodology
  • Problemsolving

Salary Information not included

Lead Physical Design Application Engineer

  • Client name Cadence
  • Location Office Location
  • Employment type Full Time
  • synthesis
  • PnR
  • STA
  • scripting languages
  • Debugging
  • Digital Implementation flow
  • Flow development

Salary Information not included

Lead Solutions Engineer

  • Client name Cadence
  • Location Office Location
  • Employment type Full Time
  • System Verilog
  • UVM
  • Verilog
  • VHDL
  • C
  • Perl
  • Python
  • USB
  • PCIe
  • Ethernet
  • DDR
  • ARM
  • UART
  • I2C
  • SPI
  • JTAG
  • Embedded C
  • Formal Verification
  • AMBA protocols
  • LPDDR
  • Version Control Software
  • Load Sharing Software
  • CPU architectures
  • Assembly Language Programming

Salary Information not included

Design Engineering Architech

  • Client name Cadence
  • Location Office Location
  • Employment type Full Time
  • Verilog
  • SystemVerilog
  • VHDL
  • RTL
  • DFT
  • Post
  • IST
  • Synthesis Automation
  • Timing Constraints
  • LBIST

Salary Information not included